Design Rules in a Semiconductor Foundry

Is designed to serve as a comprehensive and up-to-date manual for process, device, layout, and design engineers Covers topics that designers as well as layout and process engineers deal with every day, such as front-end-of-line (FEOL) and back-end-of-line BEOL DRs, coverage DRs, stressors DRs, and modeling, foundry reliability, and advance (20 nm) step-by-step process flow Can be used by those studying semiconductors and microelectronics as well as students and researchers in the fields of electrical engineering, physics, materials engineering, and chemical engineering