<ul> <li><strong>1. Digital Systems and Information</strong> </li> <li>1-1 Information Representation </li> <li>1-2 Abstraction Layers in Computer Systems Design </li> <li>1-3 Number Systems </li> <li>1-4 Arithmetic Operations </li> <li>1-5 Decimal Codes </li> <li>1-6 Alphanumeric Codes </li> <li>1-7 Gray Codes </li> <li>1-8 Chapter Summary </li> <li><strong> </strong> </li> <li><strong>2. Combinational Logic Circuits</strong> </li> <li>2-1 Binary Logic and Gates </li> <li>2-2 Boolean Algebra </li> <li>2-3 Standard Forms </li> <li>2-4 Two-Level Circuit Optimization </li> <li>2-5 Map Manipulation </li> <li>2-6 Exclusive-OR Operator and Gates </li> <li>2-7 Gate Propagation Delay </li> <li>2-8 Hardware Description Languages Overview </li> <li>2-9 HDL Representations—VHDL </li> <li>2-10 HDL Represenations—Verilog </li> <li>2-11 Chapter Summary </li> <li> </li> <li><strong>3. Combinational Logic Design</strong> </li> <li>3-1 Beginning Hierarchical Design </li> <li>3-2 Technology Mapping </li> <li>3-3 Combinational Functional Blocks </li> <li>3-4 Rudimentary Logic Functions </li> <li>3-5 Decoding </li> <li>3-6 Encoding </li> <li>3-7 Selecting </li> <li>3-8 Iterative Combinational Circuits </li> <li>3-9 Binary Adders </li> <li>3-10 Binary Subtraction </li> <li>3-11 Binary Adder-Subtractors </li> <li>3-12 Other Arithmetic Functions </li> <li>3-13 Chapter Summary </li> <li> </li> <li><strong>4. Sequential Circuits</strong> </li> <li>4-1 Sequential Circuit Definitions </li> <li>4-2 Latches </li> <li>4-3 Flip-Flops </li> <li>4-4 Sequential Circuit Analysis </li> <li>4-5 Sequential Circuit Design </li> <li>4-6 State-machine Diagrams and Applications </li> <li>4-7 HDL Representation for Sequential Circuits—VHDL </li> <li>4-8 HDL Representation for Sequential Circuits—Verilog </li> <li>4-9 Flip-Flop Timing </li> <li>4-10 Sequential Circuit Timing </li> <li>4-11 Asynchronous Interactions </li> <li>4-12 Synchronization and Metastability </li> <li>4-13 Synchronous Circuit Pitfalls </li> <li>4-14 Chapter Summary </li> <li> </li> <li><strong>5. Digital Hardware Implementation</strong> </li> <li>5-1 The Design Space </li> <li>5-2 Programmable Implementation Technologies </li> <li>5-3 Chapter Summary </li> <li> </li> <li><strong>6. Registers and Register Transfers</strong> </li> <li>6-1 Registers and Load Enable </li> <li>6-2 Register Transfers </li> <li>6-3 Register Transfer Operations </li> <li>6-4 Register Transfers in VHDL and Verilog </li> <li>6-5 Microoperations </li> <li>6-6 Microoperations on a Single Register </li> <li>6-7 Register-Cell Design </li> <li>6-8 Multiplexer and Bus-Baed Transfers for Multiple Registers </li> <li>6-9 Serial Transfer and Microoperations </li> <li>6-10 Control of Register Transfers </li> <li>6-11 HDL Representation for Shift Registers and Counters—VHDL </li> <li>6-12 HDL Representation for Shift Registers and Counters—Verilog </li> <li>6-13 Microprogrammed Control </li> <li>6-15 Chapter Summary </li> <li> </li> <li><strong>7. Memory Basics</strong> </li> <li>7-1 Memory Definitions </li> <li>7-2 Random-Access Memory </li> <li>7-3 SRAM Integrated Circuits </li> <li>7-4 Array of SRAM ICs </li> <li>7-5 DRAM ICs </li> <li>7-6 DRAM Types </li> <li>7-7 Arrays of Dynamic RAM ICs </li> <li>7-8 Chapter Summary </li> <li> </li> <li><strong>8. Computer Design Basics</strong> </li> <li>8-1 Computer Design Basics </li> <li>8-2 Datapaths </li> <li>8-3 The Arithmetic/Logic Unit </li> <li>8-4 The Shifter </</li> </ul>